MESI protocol

Results: 57



#Item
41MESI protocol / MSI protocol / MOESI protocol / Cache / CPU cache / Logarithm / Cache coherency / Computer hardware / Computing

A Consistency Architecture for Hierarchical Shared Caches Edya Ladan-Mozes and Charles E. Leiserson Computer Science and Artificial Intelligence Laboratory Massachusetts Institute of Technology Cambridge, MA 02139, USA

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Source URL: supertech.csail.mit.edu

Language: English - Date: 2014-09-16 08:27:50
42Computer memory / CPU cache / Central processing unit / Cache algorithms / MESI protocol / Computer architecture / Cache / Computer hardware / Computing

Locality-Aware Data Replication in the Last-Level Cache George Kurian, Srinivas Devadas Massachusetts Institute of Technology Cambridge, MA USA {gkurian, devadas}@csail.mit.edu Abstract

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Source URL: people.csail.mit.edu

Language: English - Date: 2014-01-23 18:46:58
43Computer memory / Central processing unit / CPU cache / Computer architecture / MESI protocol / Acumem SlowSpotter / Bus sniffing / Cache / Computer hardware / Computing

The Locality-Aware Adaptive Cache Coherence Protocol George Kurian Omer Khan Srinivas Devadas

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Source URL: people.csail.mit.edu

Language: English - Date: 2013-04-22 20:43:35
44Concurrent computing / Transaction processing / Computer memory / CPU cache / Central processing unit / MESI protocol / Lock / Cache / Linearizability / Computing / Cache coherency / Concurrency control

DeNovoND: Efficient Hardware Support for Disciplined Non-Determinism Hyojin Sung, Rakesh Komuravelli, and Sarita V. Adve Department of Computer Science University of Illinois at Urbana-Champaign {sung12, komurav1, sadve}

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Source URL: rsim.cs.illinois.edu

Language: English - Date: 2013-02-13 15:41:56
45Bus sniffing / CPU cache / Cache coherence / Cache / Scalable Coherent Interface / MESI protocol / Parallel computing / Firefly protocol / MSI protocol / Cache coherency / Computing / Computer hardware

Published in ICPP’91 CACHE COHERENCE ON A SLOTTED RING Luiz A. Barroso and Michel Dubois EE-Systems Department University of Southern California

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Source URL: barroso.org

Language: English - Date: 2005-03-07 23:37:34
46Computer architecture / Computer memory / Parallel computing / SGI Origin / Non-Uniform Memory Access / R10000 / CPU cache / Cell / MESI protocol / Computing / Cache coherency / Computer hardware

The SGI Origin: A ccNUMA Highly Scalable Server James Laudon and Daniel Lenoski Silicon Graphics, Inc.

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Source URL: www.futuretech.blinkenlights.nl

Language: English - Date: 1999-02-05 11:20:29
47Russian language / Invoice / Belarusian State University / MESI protocol / Languages of Europe / Languages of Asia / Asia

Russian Language Summer School Summer 2014 Moscow State University of Economics, Statistics and Informatics (MESI) invites you

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Source URL: www.russcentrum.pl

Language: English - Date: 2014-02-19 13:57:21
48Computer hardware / MESI protocol / Cache coherence / OpenCL / Nynorsk / Electronic filter / CPU cache / Filter / Computing / Cache coherency / Concurrent computing

Design of a Snoop Filter for Snoop Based Cache Coherency Protocols

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Source URL: www.diva-portal.org

Language: English - Date: 2013-09-19 02:29:48
49Computer hardware / MESI protocol / Firefly protocol / MOESI protocol / CPU cache / Cache / Write-once / Bus sniffing / Shared memory / Cache coherency / Computing / Concurrent computing

CACHE COHERENCE By: Mahesh Neupane

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Source URL: cse.csusb.edu

Language: English - Date: 2004-04-16 18:09:56
50Computer architecture / CPU cache / MESI protocol / Cache / Central processing unit / MSI protocol / Write-once / Computing / Cache coherency / Computer hardware

Memory Barriers: a Hardware View for Software Hackers Paul E. McKenney Linux Technology Center

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Source URL: www.rdrop.com

Language: English - Date: 2010-06-07 19:36:09
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